Architecture
See the datapath and memory overview.
About Avilicon
Building Transformer hardware for the edge
Avilicon is developing ZilionX™, a Transformer inference accelerator aimed at constrained edge systems. The work is based in Sydney, Australia.
Our engineering approach
Development began with a Python golden simulator and progressed through fixed-point RTL engines to an integrated Transformer datapath. We verify arithmetic and control behaviour in simulation, measure cycle counts, then use those measurements to guide architecture changes.
The current Stage 3M work focuses on a memory fabric for moving data between storage and compute. FPGA evaluation and representative model workloads are planned. Published benchmarks describe simulation results and their limits.